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HDI stands for High-Density Interconnect, which refers to circuit boards with higher wiring density per unit area compared to traditional circuit boards. Printed circuit board technology has been evolving to meet the demands of smaller and faster products.HDI boards are more compact and feature smaller vias, pads, copper traces, and spaces. As a result, HDI allows for denser routing, making the PCB lighter, more compact, and with fewer layers. A single HDI board can accommodate the functionalities of multiple boards previously used in a device. HDI PCBs are a preferred choice for high-layer and expensive laminated boards.
Next, let's learn what is HDI through the video below.
A via is a tiny conductive hole that can connect multiple layers in an HDI PCB and allows signals to pass through them easily. Depending on the functionality of the PCB, there can be four different types of vias on an HDI PCB, namely through-hole via, blind via, buried via, and microvia.
There are two basic HDI standard structures known as Sequential Build-Up and Every Layer Interconnect (ELIC). Among these two structures, the Sequential Build-Up structure is the most commonly used. In this structure, firstly, the core is constructed and laminated. Then, drilling, plating, and filling processes are carried out. This layer is then laminated together with other layers, followed by repeating the drilling, plating, and filling processes. ELIC is employed for applications with high interconnectivity requirements, where all microvia layers can be freely interconnected. The number of layers is one of the crucial factors in designing HDI boards. This decision is based on the type of stack-up used in the PCB design.
Based on the design requirements, HDI printed circuit boards can employ different layering techniques to achieve the desired performance.
0+N+0
This stack-up is constructed using a single lamination. N represents the number of layers in the base/core/first laminations. 0 indicates the number of sequential build-up steps added. As the complexity of the stack-up increases, the required number of steps also increases. Consequently, the cost also increases.
1+N+1
1 indicates that there are two sequential build-up layers on each side of the core layer. Each sequential build-up adds two copper layers, making a total of N+2 layers. There is an additional lamination on the top layer, allowing for stacked vias. This stack-up is suitable for BGAs with a smaller number of I/Os and offers excellent installation stability.
2+N+2
Similar to the stack-up shown above, 2+N+2 consists of 2 sequential build-up layers. The two consecutive build-up layers add 4 copper layers, resulting in a total of N+4 layers. Neither of these stack-ups includes stacked microvias, which will be explained in later stages. These are just examples of standard stack-ups used depending on the requirements of the board. The number of sequential build-up layers can be increased as per the requirements, but as the number of layers increases, manufacturing costs and time also increase.
ELIC(Every Layer Interconnection)
ELIC stands for Every Layer Interconnect. In this HDI PCB structure, all layers are high-density interconnect layers, allowing for free interconnection of conductors on any layer of the PCB through a stacked microvia structure filled with copper.
This provides a reliable interconnect solution with excellent electrical characteristics for highly complex devices with a large number of pins, such as CPU and GPU chips used in handheld and mobile devices.
Improved Reliability: Due to their smaller aspect ratio, microvias offer better reliability compared to typical through-hole vias. They are more robust than through-holes and employ superior materials and components, resulting in excellent performance for HDI (High-Density Interconnect) technology.
Enhanced Signal Integrity: HDI technology incorporates via-in-pad and blind-via techniques. These techniques help bring components closer to each other, reducing the length of signal paths. HDI technology eliminates stubs caused by through-holes, reducing signal reflection and improving signal quality. Therefore, shorter signal paths significantly enhance signal integrity.
Cost-effectiveness: With proper planning, HDI technology can reduce overall costs compared to standard PCBs. This is due to the requirement of fewer layers, smaller dimensions, and fewer PCBs needed.
Compact Design: The combination of blind and buried vias reduces the space requirements of the circuit board.
Tip 1: Choose the type of vias to minimize process complexity
The selection of vias is a critical decision that not only determines the required equipment and manufacturing steps but also affects processing time and additional costs. Using micro vias, blind vias, or buried vias can help reduce the number of layers and material costs. However, the choice between using through-hole vias, dog bone vias, or via-in-pad vias will impact the complexity of the process.
Tip 2: Choose the minimum number of components for HDI applications
Component selection is always important, but it becomes even more critical for HDI boards. The components chosen for HDI designs determine the routing widths, locations, types, and sizes of the drilled holes and stack-up. While performance is the primary consideration, packaging, traceability, and availability should also be taken into account. Having to replace components or redesign the layout can significantly increase manufacturing time and material costs.
Tip 3: Minimize stress and EMI when placing components
When components are placed in a way that causes an asymmetric distribution of vias, it can introduce uneven stress on the circuit board, potentially leading to warpage. This can significantly affect the yield, i.e., the number of usable circuit boards manufactured per panel. If the component spacing is dense, high-power components or signals may introduce electromagnetic interference (EMI), impacting signal quality. Additionally, parasitic capacitance or inductance from nearby pins or pads can affect signal integrity. Therefore, it is recommended to perform EMI modeling during the design phase to extract parasitic capacitance or inductance.
Tip 4: Minimize signal integrity issues by optimizing routing
One of the advantages of HDI is the ability to use narrower traces for signal propagation. While this reduces the size, the design of trace widths should aim for optimal signal integrity. This includes using the shortest trace lengths, consistent impedance paths, sufficient ground planes, and isolation of digital, analog, and power signals.
Tip 5: Choose stack-ups to minimize material costs
In addition to the selection of vias, the choice of PCB stack-ups also significantly impacts the manufacturing cost of HDI PCB electronic products. The material type and number of layers directly affect the required lamination and drilling cycles. Cost should be one of the determining factors when making these decisions.
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